The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 2026
Filed:
May. 10, 2022
International Business Machines Corporation, Armonk, NY (US);
Ruilong Xie, Niskayuna, NY (US);
Nicholas Anthony Lanzillo, Wynantskill, NY (US);
Julien Frougier, Albany, NY (US);
Kangguo Cheng, Schenectady, NY (US);
Eric Miller, Watervliet, NY (US);
Lawrence A Clevenger, Saratoga Springs, NY (US);
Daniel James Dechene, Albany, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A first field-effect transistor (FET) having a first source/drain region is formed. A second FET having a second source/drain region is formed, where the second FET is stacked above the first FET. A trench extending from above the second source/drain region to beneath the first source/drain region is formed, where the trench passes through portions of (i) the first source/drain region and (ii) the second source/drain region. A bottom contact is formed in the trench. A dielectric layer is formed in the trench, the dielectric layer on a top surface of the bottom contact. A top contact is formed in the trench, the top contact on a top surface of the dielectric layer.