The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Aug. 29, 2022
Applied Materials, Inc., Santa Clara, CA (US);
Suketu Arun Parikh, San Jose, CA (US);
Ashish Pal, San Ramon, CA (US);
El Mehdi Bazizi, San Jose, CA (US);
Andrew Yeoh, Portland, OR (US);
Nitin K. Ingle, San Jose, CA (US);
Arvind Sundarrajan, Singapore, SG;
Guan Huei See, Singapore, SG;
Martinus Maria Berkens, Eindhoven, NL;
Sameer A. Deshpande, Santa Clara, CA (US);
Balasubramanian Pranatharthiharan, San Jose, CA (US);
Yen-Chu Yang, Santa Clara, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
Semiconductor devices and methods of manufacturing the same are described. Transistors are fabricated using a standard process flow. A via opening extending from the top surface of the substrate to a bottom surface of the wafer device is formed, thus allowing nano TSV for high density packaging, as well as connecting the device to the backside power rail. A metal is deposited in the via opening, and the bottom surface of the wafer device is bound to a bonding wafer. The substrate is optionally thinned, and a contact electrically connected to the metal is formed.