The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2026
Filed:
Jun. 25, 2021
Intel Corporation, Santa Clara, CA (US);
William Hsu, Portland, OR (US);
Leonard P. Guler, Hillsboro, OR (US);
Vivek Thirtha, Portland, OR (US);
Nitesh Kumar, Beaverton, OR (US);
Oleg Golonzka, Beaverton, OR (US);
Tahir Ghani, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Gate-all-around integrated circuit structures having reduced gate height structures and subfins, and method of fabricating gate-all-around integrated circuit structures having reduced gate height structures, are described. For example, an integrated circuit structure includes a plurality of horizontal nanowires above a subfin, and an isolation structure on either side of the subfin. A gate stack is over the plurality of nanowires, around individual nanowires, and over the subfin. Gate spacers are on either side of the gate stack, and a dielectric capping material is inside the gate spacers with shoulder portions inside the gate stack.