Memory device, memory sytem, and operation method thereof for applying read voltages to word line

Abstract

The present disclosure provides a memory device, operation method thereof, memory system and operation method thereof. The memory device includes a peripheral circuit and a memory cell array coupled with the peripheral circuit. The memory cell array includes groups of memory cells, and one group of memory cells is correspondingly coupled with one word line. The peripheral circuit is configured to: apply a first read voltage to a selected word line in a first duration, to perform a read operation on a first page of memory cells to be read; and apply a second read voltage to the selected word line in a second duration, to perform a read operation on a second page of the memory cells to be read. A relationship of length between the first duration and the second duration is related to a relationship of magnitude between a first voltage difference and a second voltage difference.