The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 20, 2026
Filed:
Jun. 26, 2023
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Wei-Hao Liao, Taichung, TW;
Hsi-Wen Tien, Xinfeng Township, Hsinchu County, TW;
Chih-Wei Lu, Hsinchu, TW;
Yu-Teng Dai, New Taipei, TW;
Hsin-Chieh Yao, Hsinchu, TW;
Chung-Ju Lee, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A semiconductor structure includes a substrate, a gate structure, source/drain epitaxial structures, a contact structure, a first via structure, a metal line, a hard mask layer, a spacer layer, and a second via structure. The gate structure is formed over the substrate. The source/drain epitaxial structures are formed on opposite sides of the gate structure. The contact structure is formed over one of the source/drain epitaxial structures. The first via structure is formed over the contact structure. The metal line is electrically connected to the first via structure. The hard mask layer is formed over the metal line. The spacer layer is formed over a top surface of the hard mask layer and over a sidewall of metal line. The second via structure is formed over the metal line through the spacer layer.