The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 16, 2025
Filed:
Feb. 26, 2025
Deca Technologies Usa, Inc., Tempe, AZ (US);
Robin Davis, Vancouver, WA (US);
Paul R. Hoffman, San Diego, CA (US);
Clifford Sandstrom, Richfield, MN (US);
Timothy L. Olson, Phoenix, AZ (US);
Deca Technologies USA, Inc., Tempe, AZ (US);
Abstract
A method of making a QFN, DEN, or SON package may comprise forming an embedded chip panel comprising a plurality of semiconductor chips embedded in encapsulant and separated by saw streets. A conductive layer may be formed over the embedded chip panel, the conductive layer comprising bussing lines, contact pads, traces, and tie bars, wherein the bussing lines and tie bars extend into the saw streets. Vertical conductive elements may be disposed over and coupled with the conductive layer. An encapsulant layer may be disposed over the conductive layer and around the vertical conductive elements, wherein the vertical conductive elements comprise exposed ends and at least a portion of the tie bars is exposed from the encapsulant layer. Land pads, a conductive pad finish, or SMS may be electroplated over the vertical conductive elements by providing a current through the bussing lines and tie bars.