The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 2025
Filed:
May. 27, 2022
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Yi-Hsiang Chao, New Taipei, TW;
Chih-Sheng Chou, Changhua County, TW;
Shu-Ting Yang, Taipei, TW;
Ting-Wei Weng, Hsinchu, TW;
Peng-Hao Hsu, Hsinchu, TW;
Chun-Hsien Huang, Hsinchu, TW;
Hung-Hsu Chen, Tainan, TW;
Hung-Chang Hsu, Kaohsiung, TW;
Chih-Wei Chang, Hsinchu, TW;
Ming-Hsing Tsai, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A pre-cleaning technique described herein may be used to remove native oxides and/or other contaminants from a semiconductor device in a manner in which the likelihood of chopping, clipping, and/or sidewall spacer thickness reduction is reduced. As described herein, a protection layer is formed on a capping layer over a gate structure of a transistor. A pre-cleaning operation is then performed to remove native oxides from the top surface of a source/drain region of the transistor. In the pre-cleaning operation, the protection layer is consumed instead of the material of the capping layer. In this way, the use of the protection layer reduces the likelihood of removal of material from the capping layer and/or reduces the amount of material that is removed from the capping layer during the pre-cleaning operation.