The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 30, 2025
Filed:
May. 06, 2024
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chih-Hsuan Tai, Taipei, TW;
Ting-Ting Kuo, Hsinchu, TW;
Yu-Chih Huang, Hsinchu, TW;
Chih-Wei Lin, Hsinchu County, TW;
Hsiu-Jen Lin, Hsinchu County, TW;
Chih-Hua Chen, Hsinchu County, TW;
Ming-Da Cheng, Taoyuan, TW;
Ching-Hua Hsieh, Hsinchu, TW;
Hao-Yi Tsai, Hsinchu, TW;
Chung-Shi Liu, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Abstract
A package structure includes a semiconductor device, a molding compound, a first dielectric layer, and a through-via. The molding compound is in contact with a sidewall of the semiconductor device. The first dielectric layer is over the molding compound and the semiconductor device. The through-via is in the molding compound and the first dielectric layer. The through-via is a continuous element and in contact with the first dielectric layer.