The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 2025

Filed:

Mar. 26, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Pei-Yu Chou, Hsinchu County, TW;

Jr-Hung Li, Hsinchu County, TW;

Liang-Yin Chen, Hsinchu, TW;

Su-Hao Liu, Chiayi County, TW;

Tze-Liang Lee, Hsinchu, TW;

Meng-Han Chou, Hsinchu, TW;

Kuo-Ju Chen, Taichung, TW;

Huicheng Chang, Tainan, TW;

Tsai-Jung Ho, Changhua County, TW;

Tzu-Yang Ho, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/69 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H01L 23/528 (2006.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/02636 (2013.01); H01L 21/31053 (2013.01); H01L 21/76802 (2013.01); H01L 21/76819 (2013.01); H01L 21/7682 (2013.01); H01L 21/76843 (2013.01); H01L 21/76877 (2013.01); H01L 23/5329 (2013.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 30/797 (2025.01); H10D 62/151 (2025.01); H10D 64/021 (2025.01); H01L 23/5283 (2013.01); H10D 30/62 (2025.01); H10D 62/115 (2025.01); H10D 64/017 (2025.01);
Abstract

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.


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