Method and multi-channel devices with anti-punch-through features

Abstract

The present disclosure provide a method that includes receiving a substrate having a semiconductor surface of a first semiconductor material; forming an APT feature in the substrate; performing a prebaking process to the substrate with a first temperature T; epitaxially growing an undoped semiconductor layer of the first semiconductor layer and a first thickness ton the substrate at a second temperature T; epitaxially growing a semiconductor layer stack over the undoped semiconductor layer at a third temperature Tless than T, wherein the semiconductor layer stack includes first semiconductor layers and second semiconductor layers stacked vertically in an alternating configuration; patterning the semiconductor substrate, and the semiconductor layer stack to form a trench, thereby defining an active region being adjacent the trench; forming an isolation feature in the trench; selectively removing the second semiconductor layers; and forming a gate structure wrapping around each of the first semiconductor layers.