The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

May. 02, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chin-Hua Wang, New Taipei, TW;

Kuang-Chun Lee, New Taipei, TW;

Shu-Shen Yeh, Taoyuan, TW;

Tsung-Yen Lee, Changhua County, TW;

Po-Yao Lin, Hsinchu County, TW;

Shin-Puu Jeng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2005.12); H01L 21/56 (2005.12); H01L 23/31 (2005.12); H01L 23/373 (2005.12); H01L 25/00 (2005.12); H01L 25/065 (2022.12); H01L 25/18 (2022.12);
U.S. Cl.
CPC ...
H01L 23/562 (2012.12); H01L 21/563 (2012.12); H01L 23/3128 (2012.12); H01L 23/3736 (2012.12); H01L 25/0655 (2012.12); H01L 25/18 (2012.12); H01L 25/50 (2012.12);
Abstract

A chip package structure is provided. The chip package structure includes a first semiconductor die bonded over an interposer substrate and a warpage release layer structure. The chip package structure also includes a first organic material layer covering an upper surface of the first semiconductor die; and a first metal layer covering an upper surface of the first organic material layer. The first metal layer has a planar shape that is the same as a planar shape of the first semiconductor die, as viewed in a top-view perspective.


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