The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Sep. 29, 2017
Intel Corporation, Santa Clara, CA (US);
Van H. Le, Beaverton, OR (US);
Abhishek A. Sharma, Hillsboro, OR (US);
Benjamin Chu-Kung, Boise, ID (US);
Gilbert Dewey, Hillsboro, OR (US);
Ravi Pillarisetty, Portland, OR (US);
Miriam R. Reshotko, Portland, OR (US);
Shriram Shivaraman, Hillsboro, OR (US);
Li Huey Tan, Hillsboro, OR (US);
Tristan A. Tronic, Aloha, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments herein describe techniques for a semiconductor device, which may include a substrate, and a U-shaped channel above the substrate. The U-shaped channel may include a channel bottom, a first channel wall and a second channel wall parallel to each other, a source area, and a drain area. A gate dielectric layer may be above the substrate and in contact with the channel bottom. A gate electrode may be above the substrate and in contact with the gate dielectric layer. A source electrode may be coupled to the source area, and a drain electrode may be coupled to the drain area. Other embodiments may be described and/or claimed.