The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2024
Filed:
Jun. 26, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Jenny Shio Yin Ong, Bayan Lepas, MY;
Seok Ling Lim, Kulim, MY;
Bok Eng Cheah, Bukit Gambir, MY;
Jackson Chung Peng Kong, Tanjung Tokong, MY;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2023.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/07 (2006.01); H01L 25/11 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 23/5381 (2013.01); H01L 23/5383 (2013.01); H01L 23/5385 (2013.01); H01L 23/5386 (2013.01); H01L 25/0652 (2013.01); H01L 25/071 (2013.01); H01L 25/112 (2013.01); H01L 25/50 (2013.01); H01L 28/40 (2013.01);
Abstract
Disclosed embodiments include molded interconnect bridges that are in a molded frame, where the molded frame includes passive devices that couple to a metal buildup layer that includes at least one power rail and one ground rail. The molded interconnects bridge is embedded in an integrated-circuit package substrate between a die side and a land side, and closer to the die side.