The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2024

Filed:

Jul. 21, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chen-Hua Yu, Hsinchu, TW;

Chi-Hsi Wu, Hsinchu, TW;

Wen-Chih Chiou, Zhunan Township, TW;

Tsang-Jiuh Wu, Hsinchu, TW;

Der-Chyang Yeh, Hsinchu, TW;

Ming Shih Yeh, Zhubei, TW;

An-Jhih Su, Taoyuan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76877 (2013.01); H01L 21/76843 (2013.01); H01L 21/76871 (2013.01); H01L 23/5226 (2013.01); H01L 24/09 (2013.01); H01L 29/40 (2013.01);
Abstract

Embodiments provide a high aspect ratio via for coupling a top electrode of a vertically oriented component to the substrate, where the top electrode of the component is coupled to the via by a conductive bridge, and where the bottom electrode of the component is coupled to substrate. Some embodiments provide for mounting the component by a component wafer and separating the components while mounted to the substrate. Some embodiments provide for mounting individual components to the substrate.


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