The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2024
Filed:
Apr. 10, 2023
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Ting-Ting Chen, New Taipei, TW;
Chen-Han Wang, Zhubei, TW;
Keng-Chu Lin, Chao-Chou, TW;
Shuen-Shin Liang, Hsinchu, TW;
Tsu-Hsiu Perng, Zhubei, TW;
Tsai-Jung Ho, Xihu, TW;
Tsung-Han Ko, New Taipei, TW;
Tetsuji Ueno, Hsinchu, TW;
Yahru Cheng, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.