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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12009226 B1

PDFFull Text
Date of Patent:
Jun. 11, 2024

Filed:

Aug. 27, 2021

Semiconductor device and method of forming same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ting-Chen Tseng, Hsinchu, TW;

Sih-Hao Liao, New Taipei, TW;

Yu-Hsiang Hu, Hsinchu, TW;

Hung-Jui Kuo, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Nitin Parekh

Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 23/293 (2013.01); H01L 23/3157 (2013.01); H01L 24/05 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/97 (2013.01); H01L 2224/2101 (2013.01); H01L 2924/37001 (2013.01);
Abstract

A method includes attaching an integrated circuit die adjacent to a first substrate, the integrated circuit die comprising: an active device in a second substrate; a pad adjacent to the second substrate; and a first dielectric layer adjacent to the second substrate, the first dielectric layer comprising a polyimide with an ester group; forming an encapsulant around the integrated circuit die; and removing the first dielectric layer.

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Tseng, Ting-Chen. (2024). Semiconductor device and method of forming same (U.S. Patent No. 12009226). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12009226

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