The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2024
Filed:
Jun. 26, 2020
Intel Corporation, Santa Clara, CA (US);
Siddharth Chouksey, Portland, OR (US);
Gilbert Dewey, Beaverton, OR (US);
Nazila Haratipour, Hillsboro, OR (US);
Mengcheng Lu, Portland, OR (US);
Jitendra Kumar Jha, Hillsboro, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Matthew V. Metz, Portland, OR (US);
Scott B Clendenning, Portland, OR (US);
Eric Charles Mattson, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments disclosed herein include semiconductor devices with source/drain interconnects that include a barrier layer. In an embodiment the semiconductor device comprises a source region and a drain region. In an embodiment, a semiconductor channel is between the source region and the drain region, and a gate electrode is over the semiconductor channel. In an embodiment, the semiconductor device further comprises interconnects to the source region and the drain region. In an embodiment, the interconnects comprise a barrier layer, a metal layer, and a fill metal.