The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Aug. 10, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Shu-Shen Yeh, Taoyuan, TW;

Che-Chia Yang, Taipei, TW;

Chin-Hua Wang, New Taipei, TW;

Po-Yao Lin, Zhudong Township, TW;

Shin-Puu Jeng, Hsinchu, TW;

Chia-Hsiang Lin, Zhubei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 21/563 (2013.01); H01L 23/3107 (2013.01); H01L 23/3185 (2013.01); H01L 23/481 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 23/5389 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 25/0657 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/351 (2013.01); H01L 2924/35121 (2013.01);
Abstract

A method includes forming a first dielectric layer, forming a first redistribution line comprising a first via extending into the first dielectric layer, and a first trace over the first dielectric layer, forming a second dielectric layer covering the first redistribution line, and patterning the second dielectric layer to form a via opening. The first redistribution line is revealed through the via opening. The method further includes forming a second via in the second dielectric layer, and a conductive pad over and contacting the second via, and forming a conductive bump over the conductive pad. The conductive pad is larger than the conductive bump, with a first center of conductive pad being offsetting from a second center of the conductive bump. The second via is further offset from the second center of the conductive bump.


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