Iii-n transistors with contacts of modified widths

Abstract

Disclosed herein are IC structures, packages, and devices that include transistors, e.g., III-N transistors, having a source region, a drain region (together referred to as 'source/drain' (S/D) regions), and a gate stack. In one aspect, a contact to at least one of the S/D regions of a transistor may have a width that is smaller than a width of the S/D region. In another aspect, a contact to a gate electrode material of the gate stack of a transistor may have a width that is smaller than a width of the gate electrode material. Reducing the width of contacts to S/D regions or gate electrode materials of a transistor may reduce the overlap area between various pairs of these contacts, which may, in turn, allow reducing the off-state capacitance of the transistor. Reducing the off-state capacitance of III-N transistors may advantageously allow increasing their switching frequency.