The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Jun. 20, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Prashant Majhi, San Jose, CA (US);

Brian S. Doyle, Portland, OR (US);

Kevin P. O'Brien, Portland, OR (US);

Abhishek A. Sharma, Hillsboro, OR (US);

Elijah V. Karpov, Portland, OR (US);

Kaan Oguz, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/24 (2006.01); H01L 29/06 (2006.01); H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 27/22 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78391 (2014.09); H01L 27/228 (2013.01); H01L 27/2436 (2013.01); H01L 29/0673 (2013.01); H01L 29/40111 (2019.08); H01L 29/42392 (2013.01); H01L 29/4908 (2013.01); H01L 29/513 (2013.01); H01L 29/516 (2013.01); H01L 29/517 (2013.01); H01L 29/6684 (2013.01); H01L 29/66757 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/78666 (2013.01); H01L 29/78675 (2013.01); H01L 29/78696 (2013.01);
Abstract

Ferroelectric field effect transistors (FeFETs) having band-engineered interface layers are described. In an example, an integrated circuit structure includes a semiconductor channel layer above a substrate. A metal oxide material is on the semiconductor channel layer, the metal oxide material having no net dipole. A ferroelectric oxide material is on the metal oxide material. A gate electrode is on the ferroelectric oxide material, the gate electrode having a first side and a second side opposite the first side. A first source/drain region is at the first side of the gate electrode, and a second source/drain region is at the second side of the gate electrode.


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