The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2023

Filed:

Jul. 20, 2021
Applicant:

Chipbond Technology Corporation, Hsinchu, TW;

Inventors:

Yin-Chen Lin, Miaoli County, TW;

Ming-Hsiao Ke, Hsinchu, TW;

Hui-Yu Huang, Hsinchu, TW;

Chih-Ming Peng, Taichung, TW;

Chun-Te Lee, Hsinchu County, TW;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H05K 13/02 (2006.01); H05K 13/04 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0393 (2013.01); H05K 13/0215 (2018.08); H05K 13/0419 (2018.08);
Abstract

A circuit board tape includes substrate units each including a sprocket-hole region, a layout region and a joining mark. There are odd and more than three sprocket holes on the sprocket-hole region. An imaginary line extended from the joining mark is extended to between a first layout and a second layout located on the layout region. The amount of the sprocket holes between the imaginary lines of the adjacent substrate units is odd. The circuit board tape is cut along the imaginary lines of the different substrate units so as to remove the defective substrate unit from the circuit board tape and divide the circuit board tape into a front tape and a rear tape. After joining the front and rear tapes, the region where a first layout on the front tape and a second layout on the rear tape are located is defined as a combined layout region.


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