The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Nov. 01, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Stephen M. Cea, Hillsboro, OR (US);

Roza Kotlyar, Portland, OR (US);

Harold W. Kennel, Portland, OR (US);

Anand S. Murthy, Portland, OR (US);

Glenn A. Glass, Portland, OR (US);

Kelin J. Kuhn, Aloha, OR (US);

Tahir Ghani, Protland, OR (US);

Assignee:

Daedalus Prime LLC, Bronxville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 21/84 (2006.01); H01L 21/8238 (2006.01); H01L 29/161 (2006.01); H01L 27/092 (2006.01); H01L 29/778 (2006.01); H01L 29/165 (2006.01); H01L 27/12 (2006.01); H01L 29/78 (2006.01); H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1054 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/66431 (2013.01); H01L 29/66818 (2013.01); H01L 29/7781 (2013.01); H01L 29/7782 (2013.01); H01L 29/7842 (2013.01); H01L 29/7848 (2013.01); H01L 29/045 (2013.01);
Abstract

Techniques and methods related to strained NMOS and PMOS devices without relaxed substrates, systems incorporating such semiconductor devices, and methods therefor may include a semiconductor device that may have both n-type and p-type semiconductor bodies. Both types of semiconductor bodies may be formed from an initially strained semiconductor material such as silicon germanium. A silicon cladding layer may then be provided at least over or on the n-type semiconductor body. In one example, a lower portion of the semiconductor bodies is formed by a Si extension of the wafer or substrate. By one approach, an upper portion of the semiconductor bodies, formed of the strained SiGe, may be formed by blanket depositing the strained SiGe layer on the Si wafer, and then etching through the SiGe layer and into the Si wafer to form the semiconductor bodies or fins with the lower and upper portions.


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