The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 04, 2022
Filed:
Jul. 30, 2018
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Kumar Abhishek Singh, Phoenix, AZ (US);
Zhaozhi Li, Chandler, AZ (US);
Thomas J. Debonis, Tempe, AZ (US);
Robert Nickerson, Chandler, AZ (US);
Rees Winters, Glendale, AZ (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 25/18 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 23/544 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 21/481 (2013.01); H01L 21/4853 (2013.01); H01L 21/56 (2013.01); H01L 23/3185 (2013.01); H01L 23/544 (2013.01); H01L 25/50 (2013.01); H01L 2223/54426 (2013.01);
Abstract
Embodiments disclosed herein include an electronics package. In an embodiment, the electronics package comprises a package substrate and a die on the package substrate. In an embodiment, a mold layer is positioned over the package substrate. In an embodiment, the electronics package further comprises through-mold interconnects through the mold layer, and a trench that extends at least partially into the mold layer.