The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2022

Filed:

Apr. 20, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chen-Hua Yu, Hsinchu, TW;

An-Jhih Su, Taoyuan, TW;

Chi-Hsi Wu, Hsinchu, TW;

Der-Chyang Yeh, Hsinchu, TW;

Ming Shih Yeh, Zhubei, TW;

Jing-Cheng Lin, Hsinchu, TW;

Hung-Jui Kuo, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76805 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/76813 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); H01L 23/5222 (2013.01); H01L 23/5226 (2013.01); H01L 23/5384 (2013.01); H01L 24/24 (2013.01); H01L 24/27 (2013.01); H01L 24/28 (2013.01); H01L 24/73 (2013.01); H01L 24/82 (2013.01); H01L 24/13 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/244 (2013.01); H01L 2224/24147 (2013.01); H01L 2224/29144 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32265 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73217 (2013.01); H01L 2224/73227 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/821 (2013.01); H01L 2224/82051 (2013.01); H01L 2224/82951 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83815 (2013.01); H01L 2224/83895 (2013.01);
Abstract

A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.


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