The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 08, 2022

Filed:

Aug. 31, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Min-Feng Kao, Chiayi, TW;

Dun-Nian Yaung, Taipei, TW;

Jen-Cheng Liu, Hsin-Chu, TW;

Jeng-Shyan Lin, Tainan, TW;

Hsun-Ying Huang, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/324 (2006.01); H01L 21/265 (2006.01); H01L 25/065 (2006.01); H01L 23/48 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0655 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 25/0657 (2013.01); H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 29/1083 (2013.01); H01L 2224/11 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06558 (2013.01); H01L 2225/06586 (2013.01);
Abstract

The present disclosure relates to a method of forming a semiconductor device structure. The method may be performed by forming a gate structure along a first side of a semiconductor substrate. The semiconductor substrate is thinned. Thinning the semiconductor substrate causes defects to form along a second side of the semiconductor substrate opposing the first side of the semiconductor substrate. Dopants are implanted into the second side of the semiconductor substrate after thinning the semiconductor substrate. The semiconductor substrate is annealed to form a doped layer after implanting the dopants. The doped layer is formed along the second side of the semiconductor substrate.


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