The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2021

Filed:

Oct. 01, 2019
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chi-Hui Lai, Taichung, TW;

Shu-Rong Chun, Hsinchu, TW;

Kuo-Lung Pan, Hsinchu, TW;

Tin Hao Kuo, Hsinchu, TW;

Hao-Yi Tsai, Hsinchu, TW;

Chung-Shi Liu, Hsinchu, TW;

Chen-Hua Yu, Hsinchu, TW;

Yu-Chia Lai, Zhunan Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/32 (2006.01); H01L 23/42 (2006.01); H01L 25/00 (2006.01); H01L 21/78 (2006.01); H01L 21/56 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 25/105 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 21/78 (2013.01); H01L 23/3121 (2013.01); H01L 23/32 (2013.01); H01L 23/367 (2013.01); H01L 23/42 (2013.01); H01L 23/49811 (2013.01); H01L 24/16 (2013.01); H01L 24/69 (2013.01); H01L 25/50 (2013.01); H01L 21/568 (2013.01); H01L 2224/16227 (2013.01);
Abstract

A packaged semiconductor device including an integrated passive device-containing package component disposed between a power module and an integrated circuit-containing package and a method of forming the same are disclosed. In an embodiment, a device includes a first package component including a first integrated circuit die; a first encapsulant at least partially surrounding the first integrated circuit die; and a redistribution structure on the first encapsulant and coupled to the first integrated circuit die; a second package component bonded to the first package component, the second package component including an integrated passive device; and a second encapsulant at least partially surrounding the integrated passive device; and a power module attached to the first package component through the second package component.


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