The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 2021
Filed:
Sep. 29, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Juan E. Dominguez, Chandler, AZ (US);
Hyoung Il Kim, Folsom, CA (US);
Bilal Khalaf, Folsom, CA (US);
John Gary Meyers, Sacramento, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/10 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 25/105 (2013.01); H01L 23/3128 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/107 (2013.01); H01L 2225/1058 (2013.01);
Abstract
A high density die package configuration is shown for use on system boards. In one example, an apparatus includes a system board, a first package mounted to the system board, a second package mounted to the system board, and an interface package mounted between the first and the second package and coupled directly to the first package and to the second package through the respective first and second packages.