The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2021

Filed:

Oct. 01, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Cheng-Yi Peng, Taipei, TW;

Wen-Hsing Hsieh, Hsinchu, TW;

Wen-Yuan Chen, Yangmei, TW;

Jon-Hsu Ho, New Taipei, TW;

Song-Bor Lee, Zhubei, TW;

Bor-Zen Tien, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01); H01L 21/02 (2006.01); H01L 29/08 (2006.01); H01L 29/786 (2006.01); H01L 29/24 (2006.01);
U.S. Cl.
CPC ...
H01L 29/42392 (2013.01); H01L 21/02521 (2013.01); H01L 29/0847 (2013.01); H01L 29/1608 (2013.01); H01L 29/24 (2013.01); H01L 29/7851 (2013.01); H01L 29/78696 (2013.01);
Abstract

A semiconductor device includes a channel region, a source/drain region adjacent to the channel region, and a source/drain epitaxial layer. The source/drain epitaxial layer includes a first epitaxial layer epitaxially formed on the source/drain region, a second epitaxial layer epitaxially formed on the first epitaxial layer and a third epitaxial layer epitaxially formed on the second epitaxial layer. The first epitaxial layer includes at least one selected from the group consisting of a SiAs layer, a SiC layer and a SiCP layer.


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