The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 17, 2021

Filed:

Dec. 24, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chuei-Tang Wang, Taichung, TW;

Chen-Hua Yu, Hsinchu, TW;

Chung-Shi Liu, Hsinchu, TW;

Chih-Yuan Chang, Hsinchu, TW;

Jiun-Yi Wu, Taoyuan, TW;

Jeng-Shien Hsieh, Kaohsiung, TW;

Tin-Hao Kuo, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 25/065 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5385 (2013.01); H01L 21/4853 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 23/5386 (2013.01); H01L 23/5387 (2013.01); H01L 24/20 (2013.01); H01L 24/24 (2013.01); H01L 24/82 (2013.01); H01L 25/0655 (2013.01); H01L 2224/24226 (2013.01); H01L 2224/82005 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor package structure and manufacturing method thereof are provided. The semiconductor package structure includes a package structure and a rigid-flexible substrate. The package structure includes semiconductor dies, a molding compound and a redistribution layer. The molding compound laterally encapsulates the semiconductor dies. The redistribution layer is disposed at a front side of the semiconductor dies and electrically connected to the semiconductor dies. The rigid-flexible substrate is disposed at a side of the redistribution layer opposite to the semiconductor dies, and includes rigid structures, a flexible core and a circuit layer. The rigid structures respectively have an interconnection structure therein. The interconnection structures are electrically connected to the redistribution layer. The flexible core laterally penetrates and connects the rigid structures. The circuit layer is disposed over a surface of the flexible core, and electrically connected with the interconnection structures.


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