The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 2021
Filed:
May. 21, 2019
Kla-tencor Corporation, Milpitas, CA (US);
David Dowling, Chalfont St. Peter, GB;
Tarunark Singh, Reading, GB;
Bjorn Brauer, Beaverton, OR (US);
Santosh Bhattacharyya, San Jose, CA (US);
Bryant Mantiply, Mountain View, CA (US);
Hucheng Lee, Cupertino, CA (US);
Xiaochun Li, San Jose, CA (US);
Sangbong Park, Union City, CA (US);
KLA Corporation, Milpitas, CA (US);
Abstract
A method of semiconductor-wafer image alignment is performed at a semiconductor-wafer defect-inspection system. In the method, a semiconductor wafer is loaded into the semiconductor-wafer defect-inspection system. Pre-inspection alignment is performed for the semiconductor wafer. After performing the pre-inspection alignment, a first swath is executed to generate a first image of a first region on the semiconductor wafer. An offset of a target structure in the first image with respect to a known point is determined. Defect identification is performed for the first image, using the offset. After executing the first swath and determining the offset, a second swath is executed to generate a second image of a second region on the semiconductor wafer. While executing the second swath, run-time alignment of the semiconductor wafer is performed using the offset.