The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2021

Filed:

Jun. 09, 2020
Applicants:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Tsmc China Company, Limited, Shanghai, CN;

Inventors:

Ching-Wei Wu, Caotun Town, TW;

Ming-En Bu, Shanghai, CN;

He-Zhou Wan, Shanghai, CN;

Hidehiro Fujiwara, Hsinchu, CN;

Xiu-Li Yang, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/00 (2020.01); G06F 30/398 (2020.01); H01L 27/11 (2006.01); G11C 11/413 (2006.01); G06F 119/02 (2020.01);
U.S. Cl.
CPC ...
G06F 30/398 (2020.01); G11C 11/413 (2013.01); H01L 27/11 (2013.01); G06F 2119/02 (2020.01);
Abstract

A method includes specifying a target memory macro with one or more parameters, finding function-blocks in the target memory macro, and determining failure rates of the function-blocks based on an amount of transistors and area distributions in a collection of base cells. The method includes generating a failure-mode analysis for the target memory macro, from a memory compiler, based on the failure rates of the function-blocks. The method includes determining a safety level of the target memory macro, based upon the failure-mode analysis of the target memory macro.


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