The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 08, 2021

Filed:

Apr. 17, 2019
Applicant:

Yangtze Memory Technologies Co., Ltd., Zhubei, CN;

Inventors:

Jifeng Zhu, Hubei, CN;

Zhenyu Lu, Hubei, CN;

Jun Chen, Hubei, CN;

Yushi Hu, Hubei, CN;

Qian Tao, Hubei, CN;

Simon Shi-Ning Yang, Hubei, CN;

Steve Weiyi Yang, Hubei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 23/528 (2006.01); H01L 27/11582 (2017.01); H01L 27/11524 (2017.01); H01L 25/18 (2006.01); H01L 27/11529 (2017.01); H01L 27/11573 (2017.01); H01L 25/00 (2006.01); H01L 27/1157 (2017.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 27/11565 (2017.01); H01L 27/11575 (2017.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 23/481 (2013.01); H01L 23/522 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11529 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 27/11573 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 23/5329 (2013.01); H01L 23/53209 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53257 (2013.01);
Abstract

Embodiments of source structure of a three-dimensional (3D) memory device and method for forming the source structure of the 3D memory device are disclosed. In an example, a NAND memory device includes a substrate, an alternating conductor/dielectric stack, a NAND string, a source conductor layer, and a source contact. The alternating conductor/dielectric stack includes a plurality of conductor/dielectric pairs above the substrate. The NAND string extends vertically through the alternating conductor/dielectric stack. The source conductor layer is above the alternating conductor/dielectric stack and is in contact with an end of the NAND string. The source contact includes an end in contact with the source conductor layer. The NAND string is electrically connected to the source contact by the source conductor layer. In some embodiments, the source conductor layer includes one or more conduction regions each including one or more of a metal, a metal alloy, and a metal silicide.


Find Patent Forward Citations

Loading…