The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 2021

Filed:

Sep. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bok Eng Cheah, Bukit Gambir, MY;

Jackson Chung Peng Kong, Tanjung Tokong, MY;

Khang Choong Yong, Puchong, MY;

Po Yin Yaw, Bayan Lepas, MY;

Kok Hou Teh, Bayan Lepas, MY;

Assignee:

Intel Coropration, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H01L 23/64 (2006.01); H01L 23/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 23/49811 (2013.01); H01L 23/538 (2013.01); H01L 23/64 (2013.01); H01L 23/645 (2013.01); H01L 23/66 (2013.01); H01L 25/0655 (2013.01); H01L 25/10 (2013.01); H01L 2224/16227 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/30111 (2013.01);
Abstract

Semiconductor package assemblies and semiconductor packages incorporating an impedance-boosting channel between a transmitter die and a receiver die are described. In an example, a semiconductor package includes a package substrate incorporating the impedance-boosting channel having a first arc segment connected to the transmitter die and a second arc segment connected to the receiver die. The arc segments extend around respective vertical axes passing through a transmitter die electrical bump and a receiver die electrical bump, respectively. Accordingly, the arc segments introduce an inductive circuitry to increase signal integrity of an electrical signal sent from the transmitter die to the receiver die.


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