The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 2021

Filed:

May. 16, 2019
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Wan-Yi Kao, Baoshan Township, Hsinchu County, TW;

Wei-Jin Li, Hsinchu, TW;

Chung-Chi Ko, Nantou, TW;

Yu-Cheng Shiau, Hsinchu, TW;

Han-Sheng Weng, Tainan, TW;

Chih-Tang Peng, Zhubei, TW;

Tien-I Bao, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 21/02 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76837 (2013.01); H01L 21/0228 (2013.01); H01L 21/02271 (2013.01); H01L 21/76229 (2013.01); H01L 21/76232 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 27/0886 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 21/0214 (2013.01); H01L 21/02216 (2013.01); H01L 21/02222 (2013.01); H01L 21/823437 (2013.01); H01L 29/7853 (2013.01);
Abstract

A method for forming a semiconductor structure is provided. The method includes patterning a semiconductor substrate to form a first semiconductor fin and a second semiconductor fin adjacent to the first semiconductor fin, and depositing a first dielectric material on the first semiconductor fin and the second semiconductor fin on the semiconductor substrate using an atomic layer deposition process. There is a first trench between the first semiconductor fin and the second semiconductor fin. The method also includes filling the first trench with a flowable dielectric material, and heating the flowable dielectric material and the first dielectric material to form an isolation structure between the first semiconductor fin and the second semiconductor fin.


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