The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
Oct. 04, 2018
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Jiun-Ting Chen, Hsinchu, TW;
Chih-Wei Wu, Yilan County, TW;
Szu-Wei Lu, Hsinchu, TW;
Ying-Ching Shih, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01); H01L 23/538 (2006.01); H01L 21/66 (2006.01); H01L 21/683 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 24/97 (2013.01); H01L 21/486 (2013.01); H01L 21/6835 (2013.01); H01L 22/12 (2013.01); H01L 23/5384 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2221/68372 (2013.01); H01L 2224/95001 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/3511 (2013.01);
Abstract
A manufacturing method and a packaging process are provided. A package having a first die and a second die is provided. A circuit substrate having a first warpage level is provided. The package is mounted onto the circuit substrate and then heated under an elevated temperature to bond the package to the circuit substrate. The package heated under the elevated temperature is warped with a second warpage level, and the first warpage level is substantially in conformity with the second warpage level.