The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2020

Filed:

Dec. 14, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Robert Alan May, Chandler, AZ (US);

Kristof Darmawikarta, Chandler, AZ (US);

Rahul Jain, Gilbert, AZ (US);

Sri Ranga Sai Boyapati, Chandler, AZ (US);

Maroun Moussallem, Phoenix, AZ (US);

Rahul N. Manepalli, Chandler, AZ (US);

Srinivas Pietambaram, Gilbert, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/122 (2006.01); G02B 6/132 (2006.01); H01P 5/107 (2006.01); G02B 6/134 (2006.01); G02B 6/12 (2006.01);
U.S. Cl.
CPC ...
G02B 6/122 (2013.01); G02B 6/132 (2013.01); H01P 5/107 (2013.01); G02B 6/134 (2013.01); G02B 2006/12035 (2013.01);
Abstract

This document discusses, among other things, a waveguide including a first metal having an outer surface proximate a dielectric material and an inner surface defining a path of the waveguide, a method of receiving an optical signal at the inner surface of the waveguide and transmitting the optical signal along at least a portion of the path of the waveguide. A method of integrating a waveguide in a substrate includes depositing sacrificial metal on a first surface of a carrier substrate to form a core of the waveguide, depositing a first metal over the sacrificial metal and at least a portion of the first surface of the carrier substrate, forming an outer surface of the waveguide and a conductor separate from the sacrificial metal, and depositing dielectric material over the first surface of the carrier substrate about the conductor.


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