The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2020
Filed:
Mar. 11, 2019
United Microelectronics Corp., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Tzu-Chin Wu, Chiayi County, TW;
Wei-Hsin Liu, Changhua County, TW;
Yi-Wei Chen, Taichung, TW;
Chia-Lung Chang, Tainan, TW;
Jui-Min Lee, Taichung, TW;
Po-Chun Chen, Tainan, TW;
Li-Wei Feng, Kaohsiung, TW;
Ying-Chiao Wang, Changhua County, TW;
Wen-Chieh Lu, Taoyuan, TW;
Chien-Ting Ho, Taichung, TW;
Tsung-Ying Tsai, Kaohsiung, TW;
Kai-Ping Chen, Tainan, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Abstract
A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.