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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10607928 B1

PDFFull Text
Expired
Date of Patent:
Mar. 31, 2020

Filed:

Aug. 01, 2019

Reduction of laminate failure in integrated circuit (ic) device carrier

Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Anson J. Call, Poughkeepsie, NY (US);

Sushumna Iruvanti, Wappingers Falls, NY (US);

Shidong Li, Hopewell Junction, NY (US);

Brian W. Quinlan, Poughkeepsie, NY (US);

Kamal K. Sikka, Poughkeepsie, NY (US);

Rui Wang, Poughquag, NY (US);

Assignee:

International Business Machines Corporation, Armonk, NY (US);

Attorney:

ZIP Group PLLC

Primary Examiner:

Sherman Ng

Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/433 (2006.01); H01L 23/053 (2006.01); H01L 23/10 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 24/16 (2013.01); H01L 23/053 (2013.01); H01L 23/10 (2013.01); H01L 23/3185 (2013.01); H01L 23/367 (2013.01); H01L 23/433 (2013.01); H01L 2224/16227 (2013.01);
Abstract

An integrated circuit (IC) device carrier, such as a chip carrier, die carrier, or the like, includes a contact that locally reduces laminate strain within the IC device carrier. One type of contact pad described includes tapered sidewall(s). For example, a positively tapered contact pad includes one or more sidewalls obtusely angled relative to the contact surface of the IC carrier and a negatively tapered contact pad includes one or more sidewalls acutely angled relative to the contact surface of the IC carrier. Another type of contact pad described includes a contact pad connected to one or more pillars. The pillar(s) are also connected to a ring formed within an internal wiring level of the IC device carrier.

Find Patent Forward Citations

Call, Anson. (2020). Reduction of laminate failure in integrated circuit (ic) device carrier (U.S. Patent No. 10607928). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10607928

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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