The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Aug. 29, 2018
Applicant:

Micromaterials Llc, Wilmington, DE (US);

Inventors:

Ying Zhang, Santa Clara, CA (US);

Regina Freed, Los Altos, CA (US);

Nitin K. Ingle, Santa Clara, CA (US);

Ho-yung David Hwang, Cupertino, CA (US);

Uday Mitra, Cupertino, CA (US);

Assignee:

Micromaterials LLC, Wilmington, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/3105 (2006.01); H01L 23/532 (2006.01); H01L 23/522 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01L 21/0217 (2013.01); H01L 21/02178 (2013.01); H01L 21/02244 (2013.01); H01L 21/7685 (2013.01); H01L 21/76801 (2013.01); H01L 21/76808 (2013.01); H01L 21/76837 (2013.01); H01L 21/76846 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 21/76888 (2013.01); H01L 21/0228 (2013.01); H01L 21/31053 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/3212 (2013.01); H01L 21/7684 (2013.01); H01L 21/76834 (2013.01); H01L 21/76849 (2013.01); H01L 21/76885 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 2221/1026 (2013.01);
Abstract

Methods and apparatus to form fully self-aligned vias are described. A seed gapfill layer is formed on a recessed first insulating layers positioned between first conductive lines. Pillars are formed from the seed gapfill layer and a second insulating layer is deposited in the gaps between pillars. The pillars are removed and a third insulating layer is deposited in the gaps in the second insulating layer to form an overburden of third insulating layer. A portion of the overburden of the third insulating layer is removed to expose the first conductive lines and form vias.


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