The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Jan. 13, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Stephen M. Cea, Hillsboro, OR (US);

Annalisa Cappellani, Portland, OR (US);

Martin D. Giles, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Seiyon Kim, Portland, OR (US);

Kelin J. Kuhn, Aloha, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 21/268 (2006.01); H01L 29/78 (2006.01); B82Y 40/00 (2011.01);
U.S. Cl.
CPC ...
H01L 29/78618 (2013.01); H01L 21/268 (2013.01); H01L 29/0673 (2013.01); H01L 29/0847 (2013.01); H01L 29/42356 (2013.01); H01L 29/42392 (2013.01); H01L 29/66477 (2013.01); H01L 29/66742 (2013.01); H01L 29/66787 (2013.01); H01L 29/66977 (2013.01); H01L 29/7845 (2013.01); H01L 29/7848 (2013.01); H01L 29/78651 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01); B82Y 40/00 (2013.01); H01L 29/7839 (2013.01);
Abstract

Nanowire structures having non-discrete source and drain regions are described. For example, a semiconductor device includes a plurality of vertically stacked nanowires disposed above a substrate. Each of the nanowires includes a discrete channel region disposed in the nanowire. A gate electrode stack surrounds the plurality of vertically stacked nanowires. A pair of non-discrete source and drain regions is disposed on either side of, and adjoining, the discrete channel regions of the plurality of vertically stacked nanowires.


Find Patent Forward Citations

Loading…