The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10573555 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 25, 2020

Filed:

Aug. 29, 2018
Applicant:

Micromaterials Llc, Wilmington, DE (US);

Inventors:

Ying Zhang, Santa Clara, CA (US);

Regina Freed, Los Altos, CA (US);

Nitin K. Ingle, Santa Clara, CA (US);

Ho-yung Hwang, Cupertino, CA (US);

Uday Mitra, Cupertino, CA (US);

Abhijit Basu Mallick, Palo Alto, CA (US);

Assignee:

Micromaterials LLC, Wilmington, DE (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01J 37/32 (2006.01); H01L 23/532 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01J 37/32715 (2013.01); H01L 21/02244 (2013.01); H01L 21/31055 (2013.01); H01L 21/31116 (2013.01); H01L 21/76808 (2013.01); H01L 21/76819 (2013.01); H01L 21/76831 (2013.01); H01L 21/76843 (2013.01); H01L 21/76888 (2013.01); H01L 23/5226 (2013.01); H01J 2237/332 (2013.01); H01J 2237/334 (2013.01); H01L 21/31111 (2013.01); H01L 21/76834 (2013.01); H01L 21/76849 (2013.01); H01L 21/76883 (2013.01); H01L 23/53209 (2013.01); H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53252 (2013.01); H01L 23/53266 (2013.01); H01L 2221/1026 (2013.01);
Abstract

Methods and apparatus to form fully self-aligned vias are described. Portions of first conductive lines are recessed in a first insulating layer on a substrate. A first metal film is formed in the recessed portions of the first conductive lines and pillars are formed from the first metal film. A second insulating layer is deposited around the pillars. The pillars are removed to form vias in the second insulating layer. A third insulating layer is deposited in the vias and an overburden is formed on the second insulating layer. Portions of the overburden are selectively etched from the second insulating layer to expose the second insulating layer and the filled vias and leaving portions of the third insulating layer on the second insulating layer. The third insulating layer is etched from the filled vias to form a via opening to the first conductive line.


Find Patent Forward Citations

Zhang, Ying. (2020). Methods of producing self-aligned grown via (U.S. Patent No. 10573555). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10573555

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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