The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Nov. 25, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bok Eng Cheah, Bukit Gambir, MY;

Jackson Chung Peng Kong, Tanjung Tokong, MY;

Stephen Harvey Hall, Forest Grove, OR (US);

Khang Choong Yong, Puchong, MY;

Kooi Chi Ooi, Glugor, MY;

Eric C Gantner, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/538 (2006.01); H05K 1/02 (2006.01); H01L 21/56 (2006.01); H01L 23/66 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 23/5381 (2013.01); H01L 23/5387 (2013.01); H01L 23/5389 (2013.01); H01L 23/66 (2013.01); H01L 25/0655 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H05K 1/0253 (2013.01); H01L 2223/6638 (2013.01); H05K 1/0225 (2013.01); H05K 1/0245 (2013.01); H05K 1/189 (2013.01);
Abstract

An electrical interconnect for an electronic package. The electrical interconnect includes a first dielectric layer; a second dielectric layer; a signal conductor positioned between the first dielectric layer and the second dielectric layer; and a conductive reference layer mounted on the first dielectric layer, and wherein the conductive reference layer does not cover the signal conductor. The conductive reference layer may be a first conductive reference layer and the electrical interconnect further comprises a second conductive reference layer mounted on the second dielectric layer. The second conductive reference layer does not cover the signal conductor. In addition, the signal conductor may be a first signal conductor and the electrical interconnect may further include a second signal conductor between the first dielectric layer and the second dielectric layer. The first and second signal conductors may form a differential pair of conductors.


Find Patent Forward Citations

Loading…