The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2019

Filed:

Mar. 17, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Meng-Tse Chen, Changzhi Township, TW;

Yu-Chih Liu, Taipei, TW;

Hui-Min Huang, Taoyuan, TW;

Wei-Hung Lin, Xinfeng Township, TW;

Jing Ruei Lu, Taipei, TW;

Ming-Da Cheng, Jhubei, TW;

Chung-Shi Liu, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/29 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 21/561 (2013.01); H01L 21/563 (2013.01); H01L 23/00 (2013.01); H01L 23/293 (2013.01); H01L 23/3121 (2013.01); H01L 23/562 (2013.01); H01L 24/17 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 2224/16 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/92125 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06582 (2013.01); H01L 2924/15311 (2013.01);
Abstract

The present disclosure relates to a package-on-package structure providing mechanical strength and warpage control. In some embodiments, the package-on-package structure includes a first set of conductive elements coupling a first package component to a second package component. A first molding material is arranged on the first package component. The first molding material surrounds the first set of conductive elements and outer sidewalls of the second package component and has a top surface below a top surface of the second package component. The stacked integrated chip structure further includes a second set of conductive elements that couples the second package component to a third package component.


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