The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 2019
Filed:
May. 17, 2017
Intel Corporation, Santa Clara, CA (US);
Benjamin Chu-Kung, Portland, OR (US);
Sherry R. Taft, Sherwood, OR (US);
Van H. Le, Portland, OR (US);
Sansaptak Dasgupta, Hillsboro, OR (US);
Seung Hoon Sung, Portland, OR (US);
Sanaz K. Gardner, Portland, OR (US);
Matthew V. Metz, Portland, OR (US);
Marko Radosavljevic, Beaverton, OR (US);
Han Wui Then, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Techniques are disclosed for forming a defect-free semiconductor structure on a dissimilar substrate with a multi-aspect ratio mask. The multi-aspect ratio mask comprises a first, second, and third layer formed on a substrate. The second layer has a second opening wider than a first opening and a third opening in the first and third layers, respectively. All three openings are centered along a common central axis. A semiconductor material is grown from the top surface of the substrate and laterally onto the top surface of the first layer within the second opening. The semiconductor material disposed within and vertically below the third opening is etched by using the third layer as an etch mask so that the remaining material that laterally overflowed onto the top surface of the first layer forms a remaining structure.