The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Nov. 01, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ting-Chun Kuan, Taichung, TW;

I-Chih Chen, Tainan, TW;

Chih-Mu Huang, Tainan, TW;

Ching-Pin Lin, Hsinchu County, TW;

Fu-Tsun Tsai, Tainan, TW;

Ru-Shang Hsiao, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 27/088 (2006.01); H01L 21/02 (2006.01); H01L 23/532 (2006.01); H01L 29/10 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0843 (2013.01); H01L 21/0243 (2013.01); H01L 21/02107 (2013.01); H01L 23/53295 (2013.01); H01L 27/088 (2013.01); H01L 27/0883 (2013.01); H01L 29/0642 (2013.01); H01L 29/0649 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 29/1079 (2013.01); H01L 29/1083 (2013.01); H01L 29/4232 (2013.01); H01L 29/42312 (2013.01); H01L 29/42316 (2013.01);
Abstract

A semiconductor device including a substrate, a gate stack, a pair of insulator structures, and source/drain materials is provided. The substrate has a plurality of recesses, wherein the plurality of recesses defines a protruded portion of the substrate having a channel region, and the protruded portion has a first side surface and a second side surface opposite to the first side surface. The gate stack is disposed on the protruded portion of the substrate. The pair of insulator structures are disposed within the plurality of recesses and respectively covering parts of the first side surface and the second side surface of the protruded portion, wherein the channel region is uncovered by the pair of insulator structures. The source/drain materials are disposed on the substrate in the plurality of recesses and on two opposing sides of the channel region, wherein the source/drain materials cover the pair of insulator structures.


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