Zhigang Feng

Title: Zhigang Feng: Innovator in Chip Reliability

Introduction

Zhigang Feng is a notable inventor based in San Jose, California. He has made significant contributions to the field of chip reliability through his innovative patents. With a total of two patents to his name, Feng's work focuses on enhancing the performance and reliability of chip systems.

Latest Patents

Feng's latest patent involves calculating and extracting Joule-heating and self-heat induced temperature on wire segments for chip reliability. This patent describes a process where data is received that characterizes a chip in the package system (CPS) having a plurality of wires and vias. Using this data, a chip power calculation is performed, which generates a thermal-aware power map. Further analysis is conducted at the package and system level using this power map to create a tile-based CPS thermal profile. A series of chip finite element sub-models are generated, each corresponding to a different tile. A thermal field solution is solved for each sub-model, allowing for the extraction of wire temperature rises from the corresponding chip sub-model analysis. These values are then combined with temperature data from the CPS thermal profile to generate a back-annotation file covering each metal wire and via in the CPS.

Career Highlights

Zhigang Feng is currently employed at Ansys, Inc., where he continues to develop innovative solutions for chip reliability. His work has been instrumental in advancing the understanding of thermal dynamics in chip systems.

Collaborations

Feng collaborates with esteemed colleagues such as Hsiming Pan and Norman H Chang, contributing to a dynamic research environment that fosters innovation.

Conclusion

Zhigang Feng's contributions to chip reliability through his patents and collaborative efforts highlight his role as a key innovator in the field. His work not only enhances the performance of chip systems but also sets a foundation for future advancements in technology.