logo

For the Inventor, By the Inventor

Cary, NC, United States of America

Zhengtao Yu

This inventor holds 5 USPTO granted patents. Top assignee: Synopsys, Inc.. Active years: 2014-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zhengtao Yu. Retrieved from https://idiyas.com/inventor/zhengtao-yu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5

% Patents Active = 100.0

Average Co-Inventor Count = 1.2

ph-index = 2

Forward Citations = 5(Granted Patents)


Location History:

  • Cary, NC (US) (2014 - 2023)
  • Mountain View, CA (US) (2023)

Company Filing History:

goldMedal5 out of 2,604 
 
Synopsys, Inc.
 patents

Years Active: 2014-2023

Loading Chart...
5 patents (USPTO):Explore Patents
1. 11853680 - Incremental routing based pin assignment (2023-12-26),
2. 11694016 - Fast topology bus router for interconnect planning (2023-07-04),
3. 9147030 - Multiple-instantiated-module (mim) aware pin assignment (2015-09-29),
4. 9064082 - Updating pin locations in a graphical user interface of an electronic design automation tool (2015-06-23),
5. 8806407 - Multiple-instantiated-module (MIM) aware pin assignment (2014-08-12),

Title: Innovations of Zhengtao Yu

Introduction

Zhengtao Yu is a prominent inventor based in Cary, NC (US), known for his contributions to chip design and layout processes. He holds a total of 5 patents, showcasing his expertise in the field of electronics and semiconductor technology.

Latest Patents

One of his latest patents is titled "Incremental routing based pin assignment." This patent relates to a chip design layout process, specifically focusing on an incremental routing-based pin assignment technique. The method involves performing routing and pin assignment for a chip design layout, detecting changes associated with the layout, and updating the routing and pin assignment engines accordingly. Another significant patent is "Fast topology bus router for interconnect planning." This method includes receiving a netlist for a chip with a bus and determining a first routing topology based on the netlist, which helps in generating an efficient layout for the chip.

Career Highlights

Zhengtao Yu is currently employed at Synopsys, Inc., where he applies his innovative ideas to advance chip design technologies. His work has significantly impacted the efficiency and effectiveness of electronic design automation.

Collaborations

He has collaborated with notable colleagues, including Balkrishna R Rashingkar and David L Peart, contributing to various projects that enhance the capabilities of chip design.

Conclusion

Zhengtao Yu's innovative patents and contributions to the field of chip design highlight his role as a leading inventor in the technology sector. His work continues to influence advancements in electronic design automation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…