Zhan Liu

Title: Innovations of Zhan Liu in NAND Memory Technology

Introduction

Zhan Liu is an accomplished inventor based in Santa Clara, CA, specializing in advancements in NAND memory technology. He holds a patent that showcases his innovative approach to improving memory systems. His work contributes significantly to the field of electronics and data storage.

Latest Patents

Zhan Liu's notable patent is focused on a technology that enhances the efficiency of NAND memory. The patent, titled "Weak erase pulse," describes systems, apparatuses, and methods that bias a word line of a block in NAND memory to a first voltage level. It also biases a source-side select gate and a drain-side select gate of the block to a second voltage level. The technology issues a discharge erase pulse to bitlines and a source of the block, where the discharge erase pulse is issued at a third voltage level. This third voltage level is greater than the first and second voltage levels, yet less than a fourth voltage level of a standard erase pulse. In one example, the discharge erase pulse injects holes into pillars of the block and bypasses an erase of cells in the pillars of the block.

Career Highlights

Zhan Liu is currently employed at Intel NDTM US LLC, where he continues to push the boundaries of memory technology. His work at Intel has allowed him to collaborate with other talented professionals in the field, further enhancing his contributions to the industry.

Collaborations

Zhan Liu has worked alongside notable colleagues such as Chao Zhang and Krishna Kumar Parat. Their combined expertise fosters an environment of innovation and creativity, leading to significant advancements in their projects.

Conclusion

Zhan Liu's contributions to NAND memory technology through his patent and work at Intel NDTM US LLC highlight his role as a key innovator in the field. His advancements pave the way for future developments in memory systems.