Sunnyvale, CA, United States of America

Zengji Zhao

This inventor holds 1 USPTO granted patent. Top assignee: Astera Labs, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Zengji Zhao. Retrieved from https://idiyas.com/inventor/zengji-zhao

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Zengji Zhao - Innovator in Electronic Systems

Introduction

Zengji Zhao is a prominent inventor based in Sunnyvale, CA. He has made significant contributions to the field of electronic systems, particularly in reducing crosstalk interference in high-speed communication circuits. His innovative approach has led to the development of a unique interlocking shielding structure.

Latest Patents

Zhao holds a patent for an "Interlocking structure for crosstalk reduction and method of manufacture." This invention features an electronic system with a mounting substrate that includes multiple layers. The design combines an upper shield structure and a lower shield structure to create an interlocking shielding structure. This innovation effectively reduces crosstalk interference and improves return loss and insertion loss for high-speed serial communication circuits. The series of grounded reference shields in both structures further minimizes unwanted electrical signal interferences.

Career Highlights

Zengji Zhao is currently employed at Astera Labs, Inc., where he continues to push the boundaries of electronic system design. His work has been instrumental in advancing technologies that enhance communication efficiency and reliability.

Collaborations

Zhao collaborates with talented individuals such as Abhinaya Easwari Mohan and Yiqi Tang, contributing to a dynamic and innovative work environment.

Conclusion

Zengji Zhao's contributions to electronic systems through his patented innovations demonstrate his expertise and commitment to advancing technology. His work not only addresses current challenges in high-speed communication but also sets the stage for future developments in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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