Yu-Luen Deng

Title: Yu-Luen Deng and Advances in Area-Selective Deposition

Introduction

Yu-Luen Deng is an inventor associated with Hsinchu, Taiwan. His patent work concerns semiconductor manufacturing, particularly the placement of vias and metal patterns in integrated circuits. He is associated with Taiwan Semiconductor Manufacturing Company Limited.

Latest Patents

Deng is credited with 1 patent: “Area Selective Deposition for Zero Via Enclosure and Extremely Small Metal Line End Space.” The patent describes a method for manufacturing integrated circuit devices. It forms a first metal pattern on a semiconductor substrate, then uses area-selective deposition to create vias near opposing edges or terminal portions of that pattern. A second metal pattern is formed over the vias with substantially no pattern overlap, enabling zero via enclosure. The method also allows adjacent vias to be separated by the smallest end-to-end metal spacing permitted by the applicable design rules.

Career Highlights

Deng’s documented patent contribution addresses precise pattern formation in integrated circuits. By combining area-selective deposition with tightly controlled via and metal-line placement, the disclosed method targets compact layouts and demanding design-rule constraints.

Collaborations

The patent lists Chien-Wen Lai and Shih-Wei Peng as Deng’s coworkers. Their names are associated with the collaborative context of his semiconductor patent work.

Conclusion

Yu-Luen Deng’s patent reflects work on area-selective deposition techniques for achieving zero via enclosure and very small metal-line spacing in integrated circuit manufacturing.